The present disclosure relates to a photomask for a semiconductor device and a method for forming a pattern of a semiconductor device using the same.
Due to the increase in degrees of integration for semiconductor devices, a pitch between patterns has continued to decrease. In order to form patterns having a smaller pitch, patterning techniques such as spacer patterning technology (hereafter, referred to as SPT), mesh-type SPT technology using two SPT processes, and extreme ultraviolet lithography technology have been proposed. However, since patterning techniques such as the SPT process and mesh-type SPT process include an increased number of process steps, device fabrication costs increase. Furthermore, since the mentioned patterning techniques require more complex processing, there are difficulties in applying the patterning technique for mass production. Although the extreme ultraviolet lithography technology has a relatively simple process, reliable equipment which may be applied for mass production has not been fully developed. Accordingly, there is still a demand for patterning-related technology which is capable of reliably implementing a small critical dimension (CD) that is more economical.